2 Ergebnisse.

Excerpt from Analysis of Cache Memories in Highly Parallel SystemsAnalogous to reducing the effective memory access time in uniprocessor sys tems, a memory hierarchy can be used in parallel processor systems that employ a PE to central memory connection network the hierarchy comprising a local memory associated with each PE and a large central memory. The inclusion of a local memory reduces the effective memory access time since the resulting ...

Keine Beschreibung.