The shrinking of device dimension leads to reduction of gate oxide thickness. Because of this the undesirable hot electron effect and the gate tunneling current is increased. For Double gate MOSFETs, two gates control the potential barrier between the source and the drain terminals effectively, and the short channel effects can be suppressed. In DG structure, the electron current density corresponding to the two applied gate bias voltages (Vgs-front, Vgs -back) influence each other, and both cannot be neglected. The greater current density is obtained underneath the higher biased gate. Also the channel underneath the higher biased gate ends abruptly. The silicon-oxide interface corresponding to the lower biased gate has a lower current density. This leads to the assumption of two different channels having two different pinch-off points. In Dual Material Gate MOSFETs, metals with different work functions M1 andM2 amalgamate together laterally in the gate.